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| Ordering number : ENA0816 Monolithic Linear IC LA6565VR Overview Five-Channel CD Actuator Driver (BTL: 4 channels, H bridge: 1 channel) The LA6565VR is a four-channel BTL plus one-channel H bridge actuator driver developed for use in CD and DVD drives. The BTL driver channels 1 and 2 include built-in operational amplifiers allowing the LA6565VR to support a wide range of applications. Functions and Features * Five power amplifier channels on a single chip (Bridge connection (BTL): 4 channels, H bridge: 1 channel) * IO max: 1A * Built-in level shifters (except for the H bridge channel) * Muting circuits (output on/off, two systems) (The muting circuits operate for the BTL amplifiers. They do not apply to the H bridge or regulator circuits.) * Built-in regulator (Uses an external PNP transistor and is set with an external resistor.) * Output voltage setting function (loading driver) * Built-in independent operational amplifiers * Thermal shutdown circuit Specifications Maximum Ratings at Ta = 25C Parameter Supply voltage Allowable power dissipation Symbol VCC max Pd max Independent IC Mounted on a specified board Maximum output current Maximum input voltage MUTE pin voltage Operating temperature Storage temperature IO max VINB VMUTE Topr Tstg For each of the channel 1 to 4 and H bridge outputs Conditions Ratings 14 0.55 1.70 1 13 13 -30 to +85 -55 to +150 Unit V W W A V V C C * Mounted on a specified board: 76.1mmx114.3mmx1.6mm glass epoxy Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. 42507 MS IM B8-9127 No.A0816-1/9 LA6565VR Recommended Operating Conditions at Ta = 25C Parameter Supply voltage Symbol VCC Conditions Ratings 5.6 to 13 Unit V Electrical Characteristics at Ta = 25C, VCCS = VCCP1 = VCCP2 = 8V, VREF = 2.5V Parameter [Overall] Quiescent current when on Quiescent current when off Thermal shutdown circuit operating temperature [VREF Amplifier] VREF amplifier offset voltage VREF input voltage range VREF-OUT output current [Operational Amplifier] (Independent) Input voltage range Output current (sink) Output current (source) Output offset voltage Residual current (sink) [BTL Amplifier Block] (Channels 1 to 4) Output offset voltage Input voltage range Output voltage Closed circuit voltage gain Slew rate Muting on voltage Muting off voltage VOFF VIN VO VG SR VMUTE-ON VMUTE-OFF The voltage difference between each channel outputs amplifiers IO = 0.5A, the voltage between VO+ and VOin each channel The gain from the input to the output with the input amplifier set to 0dB For the independent amplifier. Times 2 when between outputs *7 2.5 0.5 V V *4 The output off voltage, for each mute function *4 [Input Amplifier Block] (Channels 1 and 2) Input voltage range Output current (sink) Output current (source) Output offset voltage VIN-OP SINK-OP SOURCE-OP VOFF-OP *5 0 2 300 -10 500 10 VCC-1.5 V mA A mV The output on voltage, for each mute function *2, *3 0.5 V/s 5.7 7.2 6.2 8 9 V times *2, *3 0 VCC-1.5 V Input voltage range of the input operational -50 50 mV VIN (OP) SINK (OP) SOURCE (OP) VOFF (OP) VCE-SINK (OP) IO (sink side) = 1mA 0 2 300 -10 500 10 0.6 VCC-1.5 V mA A mV V VREF- OFFSET VREF-IN I-VREF-OUT -10 1 1 10 VCC-1.5 mV V mA ICC-ON ICC-OFF TSD BTL amplifier output on, loading block off *1 All outputs off *1 *7 150 30 10 175 50 15 200 mA mA C Symbol Conditions min Ratings typ max Unit [Loading Block] (Channel 5, H bridge circuit) Output voltage Braking output saturation voltage Low-level input voltage High-level input voltage VO-LOAD VCE-BREAK VIN-L VIN-H 2 For forward/reverse operation, IO = 0.5A, VCONT = VCC* The output voltage during braking *6 0.3 1 V V V 5.7 6.5 V *1: The total current dissipation for VCCP1, VCCP2, and VCCS with no load. *2: The input amplifier is a buffer amplifier. *3: The voltage difference between the two sides of the load (12). *4: When the MUTE pin is high, the output will be on, and when low, the output will be off (high-impedance state). *5: The input operational amplifier source is constant current. Since the 11k resistor between this and the next stage functions as the load, the input operational amplifier gain must be set carefully. *6: The braking operation is a short (to ground) braking operation. The sink side output is on at this time. *7: Design guarantee. Continued on next page. No.A0816-2/9 LA6565VR Continued from preceding page. Parameter Symbol Conditions min [Power Supply Block] (Uses an external 2SB632K PNP transistor) Power supply output REG-IN sink current Line regulation Load regulation VOUT REG-IN-SINK VOLN VOLD IO = 200mA External PNP transistor base current 6V VCC 12V, IO = 200mA 5mA IO 200mA 1.260 5 1.285 10 10 10 100 100 1.310 V mA mV mV Ratings typ max Unit Package Dimensions unit : mm (typ) 3344 15.0 44 23 2.5 Pd max - Ta Mounted on a specified board: 76.1mmx114.3mmx1.6mm, glass epoxy Allowable power dissipation, Pd max - W 2.0 1.7 1.5 (7.8) (3.6) 5.6 7.6 1 0.65 (0.68) 0.22 22 0.2 1.7MAX 0.5 1.0 0.88 (1.5) 0.5 0.1 0 -20 0 20 40 60 80 100 ILA07157 SANYO : SSOP44JR(275mil) Ambient temperature, Ta - C No.A0816-3/9 LA6565VR Pin Functions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Pin Name FWD REV VCC2 NC VLOVLO+ VO4+ VO4VO3+ VO3PGND2 PGND1 VO2+ VO2VO1VO1+ NC VCCP1 VCCS VIN1+ VIN1VIN1 NC VIN2+ VIN2VIN2 NC VIN3VIN3 VO_OP VIN-OP VIN+OP REG_IN NC REG_OUT VREF_OUT VREF_IN VIN4 NC VIN4MUTE234 MUTE1 VCONT S_GND Description LOADING output changeover pin (FWD), LOADING logic input LOADING output changeover pin (REV), LOADING logic input LOADING power-stage power supply for channel 3 and 4 Loading output (-) Loading output (+) Output pin (+) for channel 4 Output pin (-) for channel 4 Output pin (+) for channel 3 Output pin (-) for channel 3 Power system GND Power system GND Output pin (+) for channel 2 Output pin (-) for channel 2 Output pin (+) for channel 1 Output pin (-) for channel 1 Power-stage power supply for channel 1 and 2 Signal system power supply Input pin for channel 1, Input OP-AMP (+) input Input pin for channel 1, Input OP-AMP (-) input Input pin for channel 1, Input OP-AMP output Input pin for channel 2, Input OP-AMP (+) input Input pin for channel 2, Input OP-AMP (-) input Input pin for channel 2, Input OP-AMP output Input pin for channel 3, Input OP-AMP (-) input Input pin for channel 3, Input OP-AMP output OP-AMP, output pin OP-AMP, (-) input pin OP-AMP, (+) input pin Regulator, error AMP output pin. Base to external PNP transistor connected Regulator, error AMP input pin (+) VREF_AMP (voltage follower) output pin VREF input pin. Input the external reference voltage Input pin for channel 4, Input OP-AMP output Input pin for channel 4, Input OP-AMP (-) input Output ON/OFF pin for channel 2, 3 and 4 Output ON/OFF pin for channel 1 LOADING output (H voltage) setting pin Signal system GND No.A0816-4/9 LA6565VR Pin Description Pin No. 20 21 22 24 25 26 28 29 38 40 32 31 30 1 2 Pin Name VIN1+ VIN1VIN1 VIN2+ VIN2VIN2 VIN3VIN3 VIN4VIN4 VIN+OP VIN-OP VO_OP FWD REV Input (H bridge) Logic inputs The IC is set to one of four modes, forward, reverse, brake, and free running by the combination of high and low values applied to these pins. Pin Name Input (CH1 to 4) Description Inputs (channels 1 to 4 and the independent operational amplifier) Equivalent Circuit Diagram Description VIN* VCCS VIN*+ VIN*300 300 300 SGND FWD 50k 50k 50k 50k VCCP* 1k VO* 1k RF VLO+ VLO1k 1k REV SGND 16 15 13 14 9 10 7 8 VO1+ VO1VO2+ VO2VO3+ VO3VO4+ VO4Output (BTL-AMP) Channel 1 to 4 outputs 5 6 43 VLOVLO+ VCONT Output (H bridge) H bridge (loading) output and loading output setting VCCP2 FR 20k 41 42 MUTE234 MUTE1 MUTE BTL amplifier output on/off state setting. High: output on Low: output off VCONT 20k VCCS MUTE* 40k SGND 10k 20k No.A0816-5/9 LA6565VR Truth Table (Loading (H bridge) block) FWD L REV L H L H H VLO+ OFF H L L VLOOFF L H L Loading output OFF *1 Forward Reverse Short-circuit braking *2 *1. The output goes to the high-impedance state. *2. In braking mode, the sink side transistor is turned on (for short-circuit braking). The VLO+ and VLO- pins go to a level that is essentially the ground level. Relationship Between The MUTE Pins and The Power Supply Systems (VCCP*) MUTE1 CH1(BTL) VCCP1 CH2(BTL) CH3(BTL) MUTE234 CH4(BTL) CH5(H bridge) VCCP2 No.A0816-6/9 LA6565VR Internal Block Diagram Signal system ground FWD 1 Input Thermal shutdown (LOAD output voltage setting) 44 SGND REV 2 Power system power supply 43 VCON VCCP2 3 (NC) 4 CH1 MUTE Turns ON/OFF the corresponding CH. H; Output ON, L; Output OFF CH2,3,4 44k 42 MUTE1 41 MUTE234 VLO- Output control 5 11k -+ -+ 40 VIN4- VLO+ 6 To VREFOUT 39 (NC) Level shift VO4+ VO4VO3+ VO3- 7 38 -+ VIN4 8 37 VREF_IN 9 Level shift 36 VREF_OUT 10 Power system ground 35 REG_OUT PGND2 11 -+ + -- 34 (NC) PGND1 12 Error lamp for regulator 33 REG_IN 13 Level shift VO2+ VO2VO1VO1+ 32 + -31 VIN+OP VIN-OP 14 15 Level shift 30 VO_OP 16 29 44k 11k -+ VIN3 VIN3- (NC) 17 -+ To VREFOUT 28 VCCP1 18 Power system power supply 19 Signal system ground 44k + -11k -+ -+ 44k 11k 27 (NC) VCCS VIN1+ VIN1- 26 VIN2 VIN2VIN2+ 20 25 -+ 24 21 VIN1 22 23 (NC) No.A0816-7/9 LA6565VR Sample Application Circuit MUTE234 MUTE1 1 LOADING 2 3 4 0.1F LOADING MOTOR M 2.2 0.1F TRACKING COIL 2.2 0.1F FOCUS COIL 2.2 10 35 8 9 37 36 6 7 39 5 43 42 41 40 44 38 11 12 0.1F SLED MOTOR M 2.2 0.1F SPINDLE MOTOR M 2.2 16 14 15 34 REG 33 32 31 30 29 28 27 26 25 24 23 TRACKING FOCUS SLED SPINDLE VREF VCC 13 17 VCC 18 19 20 21 22 No.A0816-8/9 LA6565VR SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of April, 2007. Specifications and information herein are subject to change without notice. PS No.A0816-9/9 |
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